In today's semiconductor manufacturing industry, it is critical to produce devices as rapidly as possible and as inexpensively as possible. A corollary to this is that it would be advantageous to produce any particular semiconductor device with a process fabrication sequence that involves the fewest number of processing operations and using the least amount of processing materials. It would clearly be advantageous to produce semiconductor devices with the same functionality, the same yield, and of the same quality, using a reduced number of processing operations and fewer processing materials.
According to conventional technology, when a semiconductor structure such as a transistor is annealed, a dielectric layer of one or more dielectric materials is maintained intact during the annealing process. The dielectric layer may serve as a stress memorization layer. This dielectric layer is then removed and a further dielectric is formed to use as a RPO (resist protect oxide) layer. The RPO is commonly formed over various structures and regions to protect the same during subsequent processing operations performed on the other structures and regions of the semiconductor substrate. The RPO may be patterned to expose portions of the underlying structures to be silicided, while protecting other portions from silicide formation during the subsequent silicidation process. This represents an area in which it would be beneficial to reduce the number of process operations and materials used. The present disclosure addresses this concern.
Another shortcoming associated with semiconductor manufacturing is related to the PIA (pre-amorphization implant)/silicidation process sequence. Conventionally, when an RPO oxide is formed and patterned prior to a silicidation process, the RPO oxide film becomes undesirably damaged during the pre-amorphization implant (PAI) advantageously used to amorphize exposed silicon surfaces prior to silicidation and while the RPO oxide is still in place. The RPO oxide damaged by the pre-silicidation PAI, is then undesirably attacked and removed by the conventionally-used pre-silicidation HF dip. This can cause silicide spikes in undesired areas especially when low activation energy metals such as nickel are used, and represents a further shortcoming in semiconductor manufacturing.